1. Technical Field
The embodiments described herein relate to a word line driving circuit of a semiconductor memory apparatus, particularly a word line driving circuit having a word line test function and a method of testing a word line using the word line driving circuit.
2. Related Art
Gaps between adjacent word lines or a word line and a bit line of a semiconductor memory apparatus are getting smaller with development of new and improved process technology. As the gap is reduced, a bridge, i.e., an abnormal current path can be formed between the adjacent word lines or a word line and a bit line, which can increase leakage currents between the lines.
In a conventional semiconductor memory apparatus a bit line having a bridge can be detected in a test mode and the bit line having a bridge can be changed with a column repair. Such a test mode operates as follows: First, a charge sharing of bit lines is performed. Next, after the charge sharing is maintained for a predetermined time, data in the bit lines is detected and amplified. When a bridge is formed between the bit line and an adjacent word line, an electrical potential on the bit line will be lost due to the charge sharing that results from the bridge.
When this occurs, there is high probability that the data detected and amplified through the bit line will be error data due to the charge sharing. Thus, the bit line affected by such a bridge can be detected by detecting the error data. The bit line with a data error can then be changed with a column repair such that normal operation is possible.
It is difficult, however, to determine if the abnormal leakage current occurs only with the bit line. Current leaks from both a bit line having the bridge and a word line, and a larger amount of current may leak from the word line than the bit line. Even so, in a conventional semiconductor memory apparatus, only a bit line having a bridge is detected and column repair is applied thereto. No measures are applied to a word line affected by such a bridge, such that it is difficult to solve operational errors of the semiconductor memory apparatus due to an abnormal operation of the word line.